Nvidia Opens Rack-Scale AI Systems to Custom Accelerators
MediaTek partnership and $3.5B investment let hyperscalers integrate proprietary chips into NVLink infrastructure without rebuilding entire systems.
Nvidia is expanding its rack-scale AI infrastructure to accommodate custom accelerators from cloud providers and AI developers, marking a strategic shift as hyperscalers increasingly design their own silicon alternatives to off-the-shelf GPUs.
The company announced an expanded partnership with MediaTek that enables customers to develop custom AI accelerators—what Nvidia calls XPUs—using its NVLink Fusion platform. MediaTek will serve as the design foundation provider for custom chip customers, while Nvidia invested $3.5 billion in convertible bonds issued by the Taiwanese semiconductor firm.
Why it matters
This move acknowledges the reality that major cloud providers are building their own AI processors—AWS has Trainium and Inferentia, Google operates TPUs, and Microsoft developed Maia accelerators. Rather than cede infrastructure control entirely, Nvidia is positioning itself as the connective tissue for heterogeneous AI systems, potentially maintaining influence even when its GPUs aren't the primary compute engine.
Technical architecture and ecosystem
NVLink Fusion combines several Nvidia technologies: NVLink-C2C chip-to-chip connectivity, NVHBM memory, and chiplet designs. According to Dion Harris, senior director of HPC and AI hyperscale infrastructure solutions at Nvidia, the platform provides "a prevalidated foundation" that lets customers focus on differentiated compute while Nvidia handles connectivity and rack-scale infrastructure.
MediaTek contributes system-on-chip design and packaging capabilities, while Nvidia's MGX ecosystem supplies the surrounding rack-scale infrastructure. Harris emphasized during a Monday media briefing that customers "don't have to go and reinvent the wheel" when integrating custom silicon.
The companies did not identify specific customers developing XPUs through this relationship or announce concrete data center deployments.
Competitive landscape
Nvidia faces competition from UALink, an open-standard interconnect backed by AMD and other chip companies. Matt Kimball, vice president and principal analyst at Moor Insights & Strategy, identified three primary options for high-speed processor connections in AI systems: scaled-up Ethernet, NVLink Fusion, and UALink.
"Heterogeneity is the future of AI," Kimball said, noting that inference workloads will drive demand for diverse processor types beyond training-focused GPUs.
AMD is incorporating UALink into its Helios rack-scale platform, which combines 72 MI455X accelerators with EPYC processors. The competing approaches reflect broader industry efforts to connect increasing numbers of accelerators within large AI systems.
Ecosystem expansion
Nvidia first announced NVLink Fusion in May 2025 and has since added multiple partners. Beyond MediaTek, supporters now include Astera Labs, Marvell, Samsung, and AIchip for custom silicon, plus Arm, Intel, Qualcomm, and SiFive on the CPU side, according to Kimball.
AWS plans to use NVLink Fusion alongside its proprietary processors, incorporating NVLink-C2C and NVLink switch technology. Harris confirmed licensing elements will apply but did not disclose specific terms.
The MediaTek partnership extends beyond data centers to local AI computing, including future RTX Spark and DGX PC platforms, as well as automotive systems.
These details were first reported by Shane Snider at Data Center Knowledge.
This is an original analysis by the Omega editorial team. Source reporting: AI Watch.
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