AI Agent Automates Semiconductor Design Rule Checking Scripts

AI tackles semiconductor verification bottleneck

Researchers at Seoul National University, working with Samsung AI Center, have developed an AI agent system that automatically generates the inspection scripts used to verify semiconductor chip designs before fabrication—a task that has traditionally required specialized manual engineering.

The technology, called Rule2DRC, addresses a critical bottleneck in chip development: converting thousands of natural-language design rules into machine-executable Design Rule Check (DRC) scripts. Professor Hyun Oh Song from Seoul National University's Department of Computer Science and Engineering led the research team, which presented its findings at ICML 2026.

Why it matters

Every new semiconductor process node requires engineers to manually rewrite verification scripts from scratch, consuming significant time and specialized expertise. Automating this translation reduces both cost and development cycles while opening pathways for broader AI-driven automation in electronic design automation (EDA) workflows—particularly valuable as chip complexity continues to escalate.

Beyond code similarity metrics

Previous attempts at automating DRC script generation relied on comparing code similarity without actually running the generated scripts. Rule2DRC takes a different approach by executing AI-generated code on real verification engines to assess functional correctness.

The benchmark comprises 1,000 design rule–inspection code problem pairs and 13,921 evaluation chip layouts. Writing these scripts manually requires expertise in specialized languages like KLayout and SVRF, plus deep knowledge of semiconductor fabrication processes.

The team also developed SplitTester, a technique that evaluates multiple AI-generated script candidates based on execution results and selects the most accurate version.

Layout-native workflow for industrial deployment

Beyond the academic benchmark, the research team built a GUI application designed for Samsung's internal operating environment. The application allows engineers to view semiconductor layouts and generate inspection codes simultaneously on a single interface—what the team calls a "layout-native workflow."

During demonstrations, the AI agent interpreted natural-language instructions, selected target regions in chip layouts, and automatically modified geometric features. Integration with Samsung's in-house large language model is currently underway.

Professor Song worked onsite with Samsung AI Center researchers in secure research environments to ensure the application could operate within Samsung's internal systems. The work earned Song an Outstanding Research Award and researcher Jinuk Kim a Best Poster Award at the Samsung AI Center NPRC Workshop.

Parallel advances in world models

Separately, Song's team developed Identifiable Token Correspondence, a world model technique also presented at ICML 2026. The method improves how AI systems simulate future scenarios by selectively reusing important tokens from previous frames, achieving state-of-the-art performance on reinforcement learning benchmarks including Crafter and Atari 100k.

Details of both projects were first reported by Seoul National University and published on the arXiv preprint server. First author Jinuk Kim will work as a research intern at AWS AI this summer.